Research

Engineering Sciences

Title :

Development of a SPICE compatible model for single event transients for circuit simulations and its applications in SET tolerant DLL design

Area of research :

Engineering Sciences

Focus area :

SET tolerant DLL design

Principal Investigator :

Dr. B. Bindu, Associate Professor, School of Electronics Engineering, VIT University, Chennai, Tamil Nadu

Timeline Start Year :

2016

Contact info :

Details

Total Budget (INR):

 44,73,502

Organizations involved

Implementing Agency :

School of Electronics Engineering, VIT University, Chennai, Tamil Nadu

Funding Agency :

Science and Engineering Research Board (SERB), Department of Science & Technology (DST), Government of India

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