Executive Summary : | Side-channel attack utilizes physical information like power consumption, electromagnetic (EM) radiation, and timing requirement of a crypto-implementation to recover the secret key. This attack often makes secure cryptographic algorithms like AES, Elliptic Curve Cryptography (ECC) vulnerable. Therefore researchers have put considerable attention in developing countermeasures to prevent such attacks. The existing side-channel countermeasures can be broadly classified into two categories: Hiding and Masking. Hiding countermeasure reduces the signal-to-noise ratio of the power leakages by introducing noise in the circuit (example: clock or voltage jitter). However, this makes the attack more difficult but does not eliminate it. On the other hand, masking provides provable security against side-channel attacks if it is implemented correctly. Threshold circuit has become the de facto standard for implementing masking countermeasure for symmetric key encryptions. Asymmetric key algorithms, on the other hand, deploy algorithmic countermeasures, however, the masking can also be used for public key cryptosystems, specially for lattice-based cryptography. Traditional side-channel attacks use statistical tools like correlation for their execution. But, in recent times, researchers have focused on using machine and deep learning to improve the efficiency of side-channel attacks. The machine learning-assisted side-channel attacks can be used for both supervised and non-supervised scenarios, applicable to both hiding and masking. Prevention against such attacks is still an open research problem. In this regard, adversarial learning is an attractive choice as its objective is to create misclassification of data in machine/deep learning algorithms. Therefore, integration of an intelligent and generic adversarial learning framework in the hardware can potentially prevent both machine/deep learning assisted and traditional side-channel attacks. However, to integrate the adversarial learning framework, the power or the EM leakage needs to be monitored on the chip itself. For this, either on-chip sensors or special circuits like Time-to-Digital Converters (TDC) can be deployed. In this project, our main objective is to integrate the adversarial learning framework and TDC circuits with the cryptosystem to develop a low-cost generic countermeasure that can be used to prevent both traditional and machine/deep learning assisted side-channel attacks. To provide the security guarantee we would be using statistical tests like F-test and student’s t-test to detect the presence of side channel leakages. Additionally, we would be using a novel side-channel leakage quantification methodology to measure the effectiveness of the proposed countermeasure in preventing existing advanced side-channel attacks. As an added advantage, a low-cost side-channel evaluation framework would be constructed by using the on-chip sensors or TDC, removing the requirement of costly oscilloscopes. |