Executive Summary : | Solar photovoltaic (PV) system is emerging as a renewable energy resource (RER), having a voltage source inverter (VSI) which regulates the active power to fulfil the load demand along with reactive power management. Moreover, the VSI with a proper control strategy can perform multifunctional operations like power factor improvement, harmonic compensation, etc., under unbalanced grid voltage conditions, as per IEEE 519-2014 standard. The control strategy meticulously works with precise reference current generation using phase locked loop (PLL) with fast and accurate phase detection. However, during grid faults due to the cooperation between the PLL and control loop, the fault may have an adverse influence on the operation of three-phase VSI, resulting in excessive current flow and causing low-frequency unstable oscillations in the grid voltages. In recent years, there is an increase in attention among researchers on power electronics-based power systems to ensure safe and reliable operation. The ultimate aim of this work is to investigate the impact on the stability criteria of the control loop of VSI since the PLL is used to detect the phase angle to synchronize converters to the power grid. The PLL consists of a phase detector, in-loop filter, and voltage-controlled oscillator. During grid fault, the bandwidth of the PLL is degrading irrespective of the proper tuning of the proportional integral (PI) controller, so the performance of the PLL’s in-loop filter refers to malfunction which causes the instability of the overall system. In practical grid-connected PV systems, the actions of PLLs may be influenced by the widely-used cascaded control loops (i.e. inner current control and outer voltage loop). Hence, analyzing the transient stability of the PLL considering the influence of the dynamics of the control loop under grid faults is of great significance and should be further investigated. In addition to that, a novel control strategy will be proposed to achieve the grid connection requirements such as voltage unbalancing, low voltage ride-through (LVRT), frequency regulation, and harmonic compensation. The strength of the proposal will be investigated through extensive MATLAB®/Simulink simulation studies and further validation is performed using the dSPACE-1104 downscaled real-time hardware setup. |